1. Field of the Invention
The present invention relates to an active-matrix liquid crystal display (LCD) device and associated panel, and a method of applying a common voltage to the LCD device.
2. Discussion of the Related Art
An active matrix type LCD device, employing a thin film transistor (TFT) as a switching device, is typically made up of two array substrates with a liquid crystal material interposed. The TFT includes gate, source, and drain electrodes. The lower substrate includes a gate line applying gate signals to the gate electrode, a data line applying data signals to the source electrode, and an insulation layer interposed therebetween. The device further includes a pixel electrode contacting the drain electrode on each pixel region defined by the gate and data lines. Each pixel includes the pixel electrode and the common electrode and the interposed liquid crystal layer. A portion of the pixel electrode, a portion of the gate line and the interposed insulation layer form a storage capacitor.
The upper substrate includes a common electrode having a transparent material. The color filter can be included in the upper substrate for color display between the substrate and the common electrode.
A liquid crystal display panel is completed by injecting the liquid crystal between the two substrates and sealed by the sealant. The panel is accompanied with the driving circuits for the gate and data lines. The scanning signals transmitted to the gate line control the magnitude of the data signal transmitted to the liquid crystal material, which can be divided into various levels, leading to diverse gray levels of the display device.
Since the TFT LCD device has many electrodes or lines in a matrix form, a parasitic resistance and a parasitic capacitance exist essentially in the device and they change the gate and data signals from the driving integrated circuit depending on the position.
The On-current required to drive the liquid crystal is defined by the current necessary to charge the pixel within the gate access time, which is represented by the following equation (1).Ion=Ctot×dVp(t)/dt  (1)                wherein Ctot=Clc+Cst+Cgs, Vp(t) is voltage applied to the pixel, and Ion=Vd/Ron, and wherein Clc is a pixel capacitance, Cst is a storage capacitance connected in parallel to the pixel capacitance, and Cgs is a parasitic capacitance between the gate electrode and the source electrode, and Ron is resistance of the liquid crystal when the gate signal is ON.        
The voltage required to drive a pixel can be expressed the following equation (2).Vp(t)=Vd×[1−EXP (−t2/{Ron×Ctot})]  (2)                wherein Vd is a data signal voltage.        
The pixel voltage (Vp(t)) is charged to the pixel and to the storage capacitor connected in parallel to the pixel. Then the signal voltage is applied to the liquid crystal and the storage capacitor through the source and drain electrodes of the TFT when the gate voltage is applied to the gate electrode. At this time, the signal is maintained until the next gate signal, even though the gate voltage is off.
However, due to the parasitic capacitance occurring between the gate and source electrodes, the pixel voltage is shifted by ΔVp, which is referred to as a kickback voltage. The kickback voltage is represented by the following equation (3).ΔVp=Cgs/(Cgs+C1c+Cst)×ΔVg  (3)                wherein ΔVg is the gap between the gate electrode voltage high and low.        
In order to provide the display, alternate currents are applied to the liquid crystal, the direct current elements remain due to the asymmetry of the polarity because of the kickback voltage, which causes bad display characteristics such as flicker or a residual display. The kickback voltage “ΔVp” depends on the capacitor and the gate voltage and varies according to the RC delay of the gate signal. The flicker caused by the kickback voltage has a distribution according to the position.
FIG. 1A shows a liquid crystal display panel using a dot inversion driving method, which means a driving method in which pixels adjacent to each other in the two-dimensional array of liquid crystal cells (pixels) alternately become positive or negative in polarity. DC voltage is generally used for the common voltage. The DC voltage from a common voltage supply circuit 11 is applied to the lower panel or array substrate (not shown). Since the common voltage connection 15 for the lower and upper panels are arranged uniformly in the two dimensional array in order to supply the same voltage to the common electrodes of the upper panel or color filter substrate 13, the common voltages at both sides of the panel have the same value as each other.
FIG. 1B is an equivalent circuit of FIG. 1A. Since the common voltages from the common voltage supply circuit 11 are supplied to the panel uniformly, the voltages V1 and V2 applied to both ends of the upper substrate have the same value as each other.
Meanwhile, the circuit illustrated in FIG. 1B inevitably causes flicker due to the difference of the optimum common voltages according to the position in the liquid crystal panel.
The gate driving IC supplies gate driving voltage to the gate electrode through the gate line. Since the gate signal is affected by the resistance of the gate line and the parasitic capacitance, it is deflected when it arrives at the end of the gate line. At that point, the data signal is lowered by that amount, causing the kickback voltage to be reduced. Further, since the signal voltage is not sufficiently applied to the liquid crystal, the desirable brightness of the display is not obtained.
In order to compensate for the deviation of the kickback voltage, a method of differentiating the common voltage is proposed. The method is explained with reference to FIGS. 2A and 2B.
FIG. 2A is a plan view illustrating a liquid crystal panel 22 having a lower panel or array substrate and an upper panel or color filter substrate. The array substrate has thin film transistors each having gate, source, and drain electrodes. The lower panel further includes pixel electrodes connected to the drain electrode of the thin film transistor. The gate electrode is connected to the gate line and the source electrode is connected to the data line. The gate line is connected to the gate driving IC 27 and the data line is connected to the data driving IC (not shown) via a TCP (Tape Carrier Package). The upper panel has a common electrode corresponding to the pixel electrode of the lower panel.
As shown in FIG. 2A, two different supply circuits 23 and 25 apply the different common voltages “Vcom2” and “Vcom1” to left and right sides of the panel 22, respectively.
FIG. 2B is an equivalent circuit of FIG. 2A. Since the common voltages are supplied from independent power supplies, the applied voltages V1 and V2 applied to both sides of the common electrode 20 are different. Thus, the flicker can be reduced using the method of applying different common voltages at both ends of the gate lines.
Meanwhile when determining the optimum common voltages applied to each side of the panel according to the method shown in FIGS. 2A and 2B IC, the contact resistance error between the common electrode having ITO (Indium Tin Oxide) and the common electrode driving terminal which transmits the common voltage from the common voltage supply. The contact resistance can be varied depending on the model of the panel or on the manufacturing error, which should be regarded when determining the optimum common voltage in order to reduce the flicker.